GATECS2016 (Set 2)
Question 1 
the security guard at a university  
a security guard at the university  
a security guard at university  
the security guard at the university 
Discuss it
We have used 'The' man so we know the person, so his university i.e. we are particularly mentioning the university Hence, THE UNIVERSITY Post of security is a general post, we are talking about. Hence, A SECURITY GUARDThis explanation has been contributed by Mohit Gupta.
Question 2 
put up with
 
put in with  
put down to  
put up against 
Discuss it
put up with  is a phrasal verb Meaning : to accept somebody/something that is annoying, unpleasant without complainingThis explanation has been contributed by Mohit Gupta.
Question 3 
mock, deride, praise, jeer
mock  
deride  
praise  
jeer 
Discuss it
Question 4 
CADBE  
JHKIL  
XVYWZ  
ONPMQ 
Discuss it
Question 5 
A  
B  
C  
D 
Discuss it
Question 6 
35
 
45  
65  
90 
Discuss it
Question 7 
(i) only
 
(ii) only  
both (i) and (ii)  
neither (i) nor (ii)

Discuss it
> Author has not said anything against internet and mobile computing but is talking about the surprising usage of these. "Many believe that the internet itself is an unintended consequence of the original invention." > The author says that many believe that 'internet itself' is unplanned but actually both internet and mobile computers are unplanned(unintended) inventions.Hence, D is the correct option of this answer. This explanation has been contributed by Mohit Gupta.
Question 8 
(i) Ooty is not a hillstation. (ii) No hillstation can have more than one lake.
(i) only  
(ii) only  
both (i) and (ii)  
neither (i) nor (ii) 
Discuss it
Question 9 
21  
27  
30  
36 
Discuss it
Question 10 
A  
B  
C  
D 
Discuss it
Question 11 
2  
3  
4  
5 
Discuss it
P....Q...(P ⇒ Q)...[P ∧ (P ⇒ Q)].......X.......[ P ∧ (P ⇒ Q) ] ⇒ X 0....0.....1............0.............1/0............1...... 0....1.....1............0.............1/0.... ......1...... 1....0.....0..... ......0.............1/0............1...... 1....1.....1............1..............1.............1.......notice that value of X doesn't matter if premise of expression i.e Premise of [ P ∧ (P ⇒ Q) ] ⇒ X i.e [ P ∧ (P ⇒ Q) ] is 0 meaning the final expression would be a tautology for all values of X if [ P ∧ (P ⇒ Q) ] is 0 but if premise is 1 (as in last row) then X must be 1 so that the final implication i.e., [ P ∧ (P ⇒ Q) ] ⇒ X is true for all values. if you replace X by all 5 options then you will find that for X = Q, True, P ∨ Q, ¬Q ∨ P the said expression would always be true for X = False the expression would not be a tautology Hence # of expression is 4 
Note: An important inference rule called "modus ponenes" says this [ P ∧ (P ⇒ Q) ] ⇒ Q is a tautology we noted that if we replace X by Q then it is indeed a tautology meaning Q is implied by [ P ∧ (P ⇒ Q) ]
Question 12 
8  
7  
9  
10 
Discuss it
Question 13 
1  
2  
3  
4 
Discuss it
Question 14 
I. If m < n, then all such systems have a solution II. If m > n, then none of these systems has a solution III. If m = n, then there exists a system which has a solutionWhich one of the following is CORRECT?
I, II and III are true  
Only II and III are true  
Only III is true  
None of them is true 
Discuss it
Question 15 
0.55  
0.7  
0.4  
0.35 
Discuss it
Question 16 
1/8  
1  
1/4  
2 
Discuss it
Question 17 
1  
2  
1  
2 
Discuss it
Here "longest latency for the sum to stabilize" means maximum delay that ripple carry adder would take to add A and B, we are given value of A and need to find the value of B. The Delay in Ripple Carry Adder is as follows  For sum there are 2 XOR gates.  For carry there is 1 XOR,1 AND and 1 OR gate. i.e total 3 gate delays in case of carry and 2 gate delays in sum.
If we do 2's complement of 1 in 8 bit we get "00000001". same we do for each option 1 : "11111111" 2 : "00000010" 1 : "00000001" 2 : "11111110"So in case of 1 the carry bit will change and thus it will take 1 extra gate delay, hence we could see that the maximum delay we could get when input at B will be 1, i.e. add "00000001" with "11111111" and would get Maximum delay. This explanation has been provided by Harshit Sidhwa.
Question 19 
1  
2  
3  
0 
Discuss it
Question 20 
16  
8  
4  
32 
Discuss it
Question 21 
15  
16  
31  
32 
Discuss it
A / \ B C / \ / \ D E F G
Question 22 
void f(int* p, int m) { m = m + 5; *p = *p + m; return; } void main() { int i=5, j=10; f(&i, j); printf("%d", i+j); }
10  
20  
30  
40 
Discuss it
#include"stdio.h" void f(int* p, int m) { m = m + 5; *p = *p + m; return; } int main() { int i=5, j=10; f(&i, j); printf("%d", i+j); }For i, address is passed. For j, value is passed. So in function f, p will contain address of i and m will contain value 10. Ist statement of f() will change m to 15. Then 15 will be added to value at address p. It will make i = 5+15 = 20. j will remain 10. print statement will print 20+10 = 30. So answer is C.
Question 23 
I. Quicksort runs in Θ(n^{2}) time II. Bubblesort runs in Θ(n^{2}) time III. Mergesort runs in Θ(n) time IV. Insertion sort runs in Θ(n) time
I and II only  
I and III only  
II and IV only  
I and IV only 
Discuss it
//// For an array already sorted in ascending order, Quicksort has a complexity Θ(n^{2}) [Worst Case] Bubblesort has a complexity Θ(n) [Best Case] Mergesort has a complexity Θ(n log n) [Any Case] Insertsort has a complexity Θ(n) [Best Case]
Question 24 
Greedy paradigm.  
DivideandConquer paradigm.  
Dynamic Programming paradigm.  
neither Greedy nor DivideandConquer nor Dynamic Programming paradigm.

Discuss it
Question 25 
O(Log^{2}N)  
O(N)  
O(N^{2})  
Θ(N^{2} Log N) 
Discuss it
Question 26 
2  
3  
4  
5 
Discuss it
Question 27 
Language L1 is defined by the grammar: S_{1} > aS_{1}b  ε Language L2 is defined by the grammar: S_{2} > abS_{2}  εConsider the following statements:
P: L1 is regular Q: L2 is regularWhich one of the following is TRUE?
Both P and Q are true  
P is true and Q is false  
P is false and Q is true  
Both P and Q are false 
Discuss it
Question 28 
L1 Regular, L2: Contextfree, L3: Recursive, L4: Recursively enumerable.Which of the following is/are TRUE?
I. L3' U L4 is recursively enumerable II. L2 U L3 is recursive III. L1* U L2 is contextfree IV. L1 U L2' is contextfree
I only
 
I and III only  
I and IV only  
I, II and III only 
Discuss it
Question 29 
(P) Lexical analysis (i) Leftmost derivation (Q) Top down parsing (ii) Type checking (R) Semantic analysis (iii) Regular expressions (S) Runtime environments (iv) Activation records
A  
B  
C  
D 
Discuss it
Question 30 
LRU (Least Recently Used)  
OPT (Optimal Page Replacement)  
MRU (Most Recently Used)  
FIFO (First In First Out) 
Discuss it
Question 31 
the lengths of the paths from the root to all leaf nodes are all equal.  
the lengths of the paths from the root to all leaf nodes differ from each other by at most 1.  
the number of children of any two nonleaf sibling nodes differ by at most 1.  
the number of records in any two leaf nodes differ by at most 1. 
Discuss it
Question 32 
Topological order  
Depthfirst order  
Breadthfirst order  
Ascending order of transaction indices 
Discuss it
Question 33 
Anarkali’s public key.  
Salim’s public key.  
Salim’s private key.  
Anarkali’s private key. 
Discuss it
Question 34 
A station stops to sense the channel once it starts transmitting a frame.  
The purpose of the jamming signal is to pad the frames that are smaller than the minimum frame size.  
A station continues to transmit the packet even after the collision is detected.  
The exponential backoff mechanism reduces the probability of collision on retransmissions 
Discuss it
Question 35 
HTTP GET request, DNS query, TCP SYN  
DNS query, HTTP GET request, TCP SYN  
DNS query, TCP SYN, HTTP GET request  
TCP SYN, DNS query, HTTP GET request 
Discuss it
Question 36 
(a, b) R (c, d) if a <= c or b <= d.Consider the following propositions:
P: R is reflexive Q: R is transitiveWhich one of the following statements is TRUE?
Both P and Q are true.  
P is true and Q is false.  
P is false and Q is true.  
Both P and Q are false. 
Discuss it
Question 37 
A  
B  
C  
D 
Discuss it
Suppose if there are two statements P and Q, P=>Q = ~PvQ i.e. The only situation where implication fails is (=>) when P is true and Q is false. i.e. A truth statement can't imply a false statement. So, for these type of questions it will be better to take option and check for some arbitrary condition By looking options, we are pretty sure that A,B are correct Suppose X is any number and statement is P(x) = X is a prime number Q(x) = X is a nonprime number If we look at option D, Before Implication : For all x, x is either prime or nonprime which is true After Implication : For all x, x is prime or for all x, x is nonprime which is obviously false i.e. here, truth statement implies a false statement which is not valid. If we carefully look at option C, There exists a number x, which is both prime and nonprime which is false and a false statement can imply either true or false. So option (C) is correct So Answer is Option (D)This explanation has been contributed by Anil Saikrishna.
Question 38 
I. Each compound in U \ S reacts with an odd number of compounds. II. At least one compound in U \ S reacts with an odd number of compounds. III. Each compound in U \ S reacts with an even number of compounds.Which one of the above statements is ALWAYS TRUE?
Only I  
Only II  
Only III  
None 
Discuss it
Question 39 
4  
13  
8  
16 
Discuss it
Question 40 
28  
20  
18  
30 
Discuss it
Question 41 
100  
200  
400  
500 
Discuss it
One instruction is divided into five parts, 1) The opcode As we have instruction set of size 12, an instruction opcode can be identified by 4 bits, as 2^4=16 and we cannot go any less. 2) & (3) Two source register identifiers As there are total 64 registers, they can be identified by 6 bits. As they are two i.e. 6 bit + 6 bit. 4) One destination register identifier Again it will be 6 bits. 5) A twelve bit immediate value 12 bit. Adding them all we get, 4 + 6 + 6 + 6 + 12 = 34 bit = 34/8 byte = 4.25 byte. As there are 100 instructions, We have a size of 425 byte, which can be stored in 500 byte memory from the given options. Hence (D) 500 is the answer.
Question 42 
24  
20  
30  
40 
Discuss it
We know cache size = no.of.sets* linesperset* blocksize Let us assume no of sets = 2^x And block size= 2^y So applying it in formula. 2^19 = 2^x + 8 + 2^y; So x+y = 16 Now we know that to address block size and set number we need 16 bits so remaining bits must be for tag i.e., 40  16 = 24 The answer is 24 bitsIf question extends and asks as what is the size of comparator, we need then it is 24 bit comparator. The above explanation is contributed by Sumanth Sunny Alternate Explanation:
Physical Address Bits = T(Tag Bits) + S(Set Bits) + O(Offset Bits) = 40 bits (given) Set = 8 (given) Size of cache = 512 KB (given) Size of lines = 512 / 8 = 64 KB So, O = 64/8 = 8 bits Now, S + O = 8 + 8 = 16 bits Hence, T = 40  16 = 24 bits
This explanation is contributed by Mohit Gupta. Refer the following links for more understanding in the above topic: Cache Memory Cache Organization  Introduction
Question 43 
2  
4  
8  
16 
Discuss it
Consider this pipeline (V1) > (V2) > (V3) Can be written as (V) > (4V/3) > (V/2) Where given V = V1 = 3V2/4 = 2V3Largest stage is stage 2 with 4V/3 seconds time required. Speed of processor is limited by this stage only. In fact this is the speed of the processor. Frequency given is 3Ghz, which means processor can execute
3 Giga clock cycle.... in 1 second Or 1 clock cycle .....in (1/3G) secs (G for giga)But we know that stage latency of the largest stage in pipeline limits the time of 1 clock cycle. Hence
4V/3 = 1 clock cycle = 1/3G secs V = 1/4G...........(1)Now largest stage that is stage 2 is split into equal size, so new pipeline is
(V)>(2V/3)>(2V/3)>(V/2)Now largest stage is V seconds Hence,
In V seconds do 1 clock cycle In 1 second do 1/V clock cycles But V = 1/4G So in 1 second do 4 Ghz. {ANS}
Question 44 
6  
7  
8  
9 
Discuss it
Question 45 
int exp(int X, int Y) { int res = 1, a = X, b = Y; while ( b != 0 ) { if ( b%2 == 0) { a = a*a; b = b/2; } else { res = res*a; b = b1; } } return res; }Which one of the following conditions is TRUE before every iteration of the loop
A  
B  
C  
D 
Discuss it
Before Iteration 1: X^Y=64 res ∗ (a^b)=64 Before Iteration 2: X^Y=64 res ∗ (a^b)=64 Before Iteration 3: X^Y=64 res ∗ (a^b)=64
Question 46 
+  1 6 7 * 2 ˆ 5  3 4 *  
 + 1 * 6 7 ˆ 2  5 * 3 4  
 + 1 * 7 6 ˆ 2  5 * 4 3  
1 7 6 * + 2 5 4 3 *  ˆ  
Discuss it
 Acc. to Ques. New Order algorithm is : 1) Visit Root Node 2) Visit Right Node (N R L) 3) Visit Left Node ie. New Order Expression will be a total reverse of the PostOrder algorithm PostOrder Expression : 3 4 * 5 – 2 ˆ 6 7 * 1 + – Hence , New Order Expression : – + 1 * 7 6 ^ 2 – 5 * 4 3
This solution is contributed by Mohit Gupta.
Question 47 
int f(int *p, int n) { if (n <= 1) return 0; else return max(f(p+1,n1),p[0]p[1]); } int main() { int a[] = {3,5,2,6,4}; printf("%d", f(a,5)); }Note: max(x,y) returns the maximum of x and y. The value printed by this program is
2  
3  
4  
5 
Discuss it
Question 48 
1500  
2000  
500  
100 
Discuss it
Question 49 
2.2 to 2.4  
3.2 to 3.4  
0 to 1.8  
1 
Discuss it
Question 50 
2  
4  
64  
32 
Discuss it
7 / [1..6] 1 \ [2..7]Therefore count is 2^{6} = 64 Another Explanation: Consider these cases, 1 2 3 4 5 6 7 1 2 3 4 5 7 6 1 7 6 5 4 3 2 1 7 6 5 4 2 3 7 6 5 4 3 2 1 7 6 5 4 3 1 2 7 1 2 3 4 5 6 7 1 2 3 4 6 5 For height 6, we have 2 choices. Either we select the root as 1 or 7. Suppose we select 7. Now, we have 6 nodes and remaining height = 5. So, now we have 2 ways to select root for this subtree also. Now, we keep on repeating the same procedure till remaining height = 1 For this last case also, we have 2 ways. Therefore, total number of ways = 2^{6}= 64
Question 51 
Θ(n^{2})  
Θ(m+n)  
Θ(m^{2})  
Θ(n^{4}) 
Discuss it
Since memory is not a constraint here, first we will create a data structure for storing the address of adjacency entries for each adjacency list. For faster retrieval we will create a 2D array of pointers of size (n2) which will point to adjacency entries in the graph. If there is an edge between u and v, then our data structure A[u][v] contains the address of the adjacency entry of v in the adjacency list of u. Otherwise it can be NULL. For more clear picture, refer to the image given below.
This can be done in O(m+n) time as only one traversal of G is required to create A. Now We will change the dfs algorithm to to set the twin pointer in each entry in each adjacency list.
Algorithm : If we are currently at the vertex v in the dfs function, we can change the loop of traversing all the adjacency entries in the adjacency list of v as follows :
For each node in adj_list[v]:
{
if(visited[node.value] != 0)
{
call_to_dfs(node.value)
}
if(node.twin == NULL){
node.twin = A[node.value][v] //Setting the twin pointers in both the entries
A[node.value][v].twin = A[v][node.value]
}
}
We are assuming that there is a twin field in the struct defined for representing adjacency entries in the Graph. Total time complexity = O(m+n).
Related link: http://www.geeksforgeeks.org/depthfirsttraversalforagraph/
This solution is contributed by Pranjul Ahuja.
Question 52 
I. If all states of an NFA are accepting states then the language accepted by the NFA is Σ∗ . II. There exists a regular language A such that for all languages B, A ∩ B is regular.Which one of the following is CORRECT?
Only I is true  
Only II is true  
Both I and II are true  
Both I and II are false 
Discuss it
Question 53 
Both L1 and L2 are contextfree.  
L1 is contextfree while L2 is not contextfree.  
L2 is contextfree while L1 is not contextfree.  
Neither L1 nor L2 is contextfree. 
Discuss it
Question 54 
L1 = { <M>  M takes at least 2016 steps on some input}, L2 = { <M>  M takes at least 2016 steps on all inputs} and L3 = { <M>  M accepts ε},where for each Turing machine M, <M> denotes a specific encoding of M. Which one of the following is TRUE?
L1 is recursive and L2, L3 are not recursive  
L2 is recursive and L1, L3 are not recursive  
L1, L2 are recursive and L3 is not recursive  
L1, L2, L3 are recursive 
Discuss it
Question 55 
A  
B  
C  
D 
Discuss it
Question 56 
int a[10][3];The grammars use D as the start symbol, and use six terminal symbols int ; id [ ] num.
Grammar G1 D → int L; L → id [E E → num] E → num] [E Grammar G2 D → int L; L → id E E → E[num] E → [num]Which of the grammars correctly generate the declaration mentioned above?
Both G1 and G2  
Only G1  
Only G2  
Neither G1 nor G2 
Discuss it
Grammar G1 D → int L; L → id [E E → num] E → num] [E Grammar G2 D → int L; L → id E E → E[num] E → [num]
Question 57 
8.25  
10.25  
6.35  
4.25 
Discuss it
Question 58 
This is a correct twoprocess synchronization solution.  
This solution violates mutual exclusion requirement.  
This solution violates progress requirement.  
This solution violates bounded wait requirement. 
Discuss it
It satisfies the mutual excluision : Process P0 and P1 could not have successfully executed their while statements at the same time as value of ‘turn’ can either be 0 or 1 but can’t be both at the same time. Lets say, when process P0 executing its while statements with the condition “turn == 1”, So this condition will persist as long as process P1 is executing its critical section. And when P1 comes out from its critical section it changes the value of ‘turn’ to 0 in exit section and because of that time P0 comes out from the its while loop and enters into its critical section. Therefore only one process is able to execute its critical section at a time.
Its also satisfies bounded waiting : It is limit on number of times that other process is allowed to enter its critical section after a process has made a request to enter its critical section and before that request is granted. Lets say, P0 wishes to enter into its critical section, it will definitely get a chance to enter into its critical section after at most one entry made by p1 as after executing its critical section it will set ‘turn’ to 0 (zero). And viceversa (strict alteration).
Progess is not satisfied : Because of strict alternation no process can stop other process from entering into its critical section.This explanation has been contributed by Dheerendra Singh.
Question 59 
7  
8  
9  
10 
Discuss it
Question 60 
10  
20  
30  
40 
Discuss it
9x +1 < 6 9x < 5 x < 0.5556For 20 MB, miss rate is 60% and for 30 MB, it is 40%. Thus, the smallest cache size required to ensure an average read latency of less than 6 ms is 30 MB.
Question 61 
S = r2(X); r1(X); r2(Y); w1(X); r1(Y); w2(X); a1; a2;where ri(Z) denotes a read operation by transaction Ti on a variable Z, wi(Z) denotes a write operation by Ti on a variable Z and ai denotes an abort by transaction Ti . Which one of the following statements about the above schedule is TRUE?
S is nonrecoverable  
S is recoverable, but has a cascading abort  
S does not have a cascading abort
 
S is strict 
Discuss it
 T2 overwrites a value that T1 writes
 T1 aborts: its “remembered” values are restored.
 Cascading Abort could have arised if  > Abort of T1 required abort of T2 but as T2 is already aborted , its not a cascade abort. Therefore, Option C
Question 62 
with total(name, capacity) as select district_name, sum(capacity) from water_schemes group by district_name with total_avg(capacity) as select avg(capacity) from total select name from total, total_avg where total.capacity >= total_avg.capacity
1  
2  
3  
4 
Discuss it
Ajmer 20 Bikaner 40 Charu 30 Dungargarh 10Then average capacity is computed,
Average Capacity = (20 + 40 + 30 + 10)/4 = 100/4 = 25.Finally districts with more than average are selected.
Bikaner is 40 which is greater than average (25) Charu is 30 which is also greater than average (25). Therefore answer is 2 tuples.
Question 63 
200  
250  
400  
1200 
Discuss it
Question 64 
I. At least three nonoverlapping channels are available for transmissions. II. The RTSCTS mechanism is used for collision detection. III. Unicast frames are ACKed.
All I, II, and III  
I and III only  
II and III only  
II only 
Discuss it
Question 65 
2  
4  
6  
8 
Discuss it
GATECS2016 (Set 1)