GATE | GATE-CS-2016 (Set 1) | Question 42

The stage delays in a 4-stage pipeline are 800, 500, 400 and 300 picoseconds. The first stage (with delay 800 picoseconds) is replaced with a functionally equivalent design involving two stages with respective delays 600 and 350 picoseconds. The throughput increase of the pipeline is _______ percent. [This Question was originally a Fill-in-the-Blanks question]